Title
Using Hardware Transactional Memory to Implement Speculative Privatization in OpenMP
Date Issued
01 January 2022
Access level
metadata only access
Resource Type
conference paper
Author(s)
Baldassin A.
São Paulo State University
Publisher(s)
Springer Science and Business Media Deutschland GmbH
Abstract
Loop Thread-Level Speculation on Hardware Transactional Memories is a promising strategy to improve application performance in the multicore era. However, the reuse of shared scalar or array variables introduces constraints (false dependences or false sharing) that obstruct efficient speculative parallelization. Speculative privatization relieves these constraints by creating speculatively private data copies for each transaction thus enabling scalable parallelization. To support it, this paper proposes two new OpenMP clauses to parallel for that enable speculative privatization of scalar or arrays in may DOACROSS loops: spec_private and spec_reduction. We also present an evaluation that reveals that, for certain loops, speed-ups of up to 3.24 × can be obtained by applying speculative privatization in TLS.
Start page
57
End page
73
Volume
13149 LNCS
Language
English
OCDE Knowledge area
Bioinformática
Ciencias de la computación
Subjects
Scopus EID
2-s2.0-85125331337
Source
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Resource of which it is part
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
ISSN of the container
03029743
ISBN of the container
9783030959524
Conference
33rd International Workshop on Languages and Compilers for Parallel Computing, LCPC 2020
Sponsor(s)
Supported by FAPESP, grants 18/07446-8 and 18/15519-5.
Sources of information:
Directorio de Producción Científica
Scopus