The paper introduces the Fast Discrete Periodic Radon Transform (FDPRT) which represents a new algorithm and associated architecture for computing Discrete Periodic Radon Transforms. For square images of size p x p, p prime, the Discrete Periodic Radon Transform (DPRT) requires p2(p1) additions for calculating image projections along a minimal number of prime directions. The proposed FDPRT architecture can compute the DPRT in p + 1 + ⌈log2(p)⌉ clock cycles which represents a significant improvement over p2 + p + 1 clock cycles that corresponds to the fastest, previously-reported implementation. The VHDL code of the FDPRT IP core is available under the reconfigurable computer architecture research link from ivpcl.org. © 2014 IEEE.