III-V materials with quantum wells or quantum dot active regions have proven to be relatively efficient devices for amplifying light. However, integration and scaling of many other functions are moving towards the development of ever more complex photonic integrated circuits (PICs). Assembling these devices into hybrid/heterogeneous PICs poses a challenge in terms of bandwidth and footprint. In this work, we propose a Particle Swarm Optimized methodology to generate non-intuitive structures that couple light vertically from a III-V platform to a silicon-on-insulator chip. By designing heuristically optimized III-V and silicon tapers, we can overcome the limitations of typical linearly-varying spot-size converters in terms of footprint, without sacrificing bandwidth. Furthermore, the optimization parameters are adjusted to fit the usual design rule constraints that are ready for mass production, namely UV-lithography limits.