Title
A digital hardware architecture for a three-input one-output zero-order ANFIS
Date Issued
07 May 2012
Access level
metadata only access
Resource Type
Conference Proceeding
Abstract
A digital system architecture for a three-input one-output zero-order ANFIS (Adaptive Neuro-Fuzzy Inference System) is presented. The proposed architecture takes into account that the training process is done off-line in the MATLAB environment. The system is implemented as a nonlinear-function generator for test purposes. Post-place and route simulation results obtained on a Xilinx Spartan-3 XC3S200 FPGA are presented. Its correct operation is verified by the results obtained for two chosen functions. These results show that the system is capable of achieving a close approximation of any of the functions with a fast response time. © 2012 IEEE.
Language
English
OCDE Knowledge area
Ciencias de la computación Hardware, Arquitectura de computadoras
Scopus EID
2-s2.0-84860427621
ISBN
9781467312080
ISBN of the container
978-146731208-0
DOI of the container
10.1109/LASCAS.2012.6180304
Conference
2012 IEEE 3rd Latin American Symposium on Circuits and Systems, LASCAS 2012 - Conference Proceedings
Sources of information: Directorio de Producción Científica Scopus