Title
Flexible and configurable integer 1-D discrete wavelet transform architecture in FPGAs using digit-serial technique
Date Issued
01 January 2000
Access level
metadata only access
Resource Type
conference paper
Author(s)
Iparraguirre-Cárdenas D.
Publisher(s)
Institute of Electrical and Electronics Engineers Inc.
Abstract
The presented architecture allows to configure the discrete 1-D Wavelet transform (DWT) computing (number of samples and number of octaves) from the outside and verifies if the given configuration is a right option before beginning the transform process. The reached configuration is not missed when the process is finished and can be used again for another data sequence without the need of a reset. This is useful for expanding this architecture towards the 2-D DWT. The architecture has been compiled on the Max+Plus II environment for FLEX 10K devices with different types of synthesis. It was described using AHDL (Altera Hardware Description Language) in a parameterized format, which facilitates the implementation of the same architecture with different characteristics.
Start page
607
End page
612
Volume
2
Language
English
OCDE Knowledge area
Ingeniería de sistemas y comunicaciones
Hardware, Arquitectura de computadoras
Scopus EID
2-s2.0-0034428264
Conference
IEEE International Symposium on Industrial Electronics
Sources of information:
Directorio de Producción Científica
Scopus