Title
FPGA implementation of a huffman decoder for high speed seismic data decompression
Date Issued
01 January 2014
Access level
metadata only access
Resource Type
conference paper
Author(s)
Carlos Fajardo A.
Reyes O.M.
Javier Castillo V.
Universidad Industrial de Santander
Publisher(s)
Institute of Electrical and Electronics Engineers Inc.
Abstract
A seismic survey can produce a vast amount of data which is on the order of hundreds of terabytes. A high performance seismic data decompression algorithm can solve problems related not only to storage and transmission but also bandwidth. Decoding is one of the most expensive computational process in seismic data decompression due to the use of enthropy encoding algorithms as Huffman or arithmetic coding. We have designed a Huffman decoder and implemented it on an FPGA. Results indicate that the operating frequency, throughput and use of logical resources in our implementation are better than other predecessors. The design exploits the advantages of the FPGAs to process data at the bit level and so that it can operate at frequencies up to 265 MHz and uses less than 1% of the FPGA logic resources. © 2014 IEEE.
Start page
396
Number
6824448
Language
English
OCDE Knowledge area
Ciencias de la información
Scopus EID
2-s2.0-84903434719
Resource of which it is part
Data Compression Conference Proceedings
ISSN of the container
10680314
ISBN of the container
978-147993882-7
Conference
2014 Data Compression Conference, DCC 2014
Sources of information: Directorio de Producción Científica Scopus