Title
Reduced power consumption in the FPGA-based Universal Link for LVDS communications
Date Issued
11 April 2016
Access level
metadata only access
Resource Type
conference paper
Author(s)
Publisher(s)
Institute of Electrical and Electronics Engineers Inc.
Abstract
We present a novel version of the FPGA-based Universal Link for LVDS (low-voltage differential signaling) communications that reduces the power consumption by sending the information only when a new data is input. In the a regular LVDS protocol, 4 wires are required for a full duplex communication. The aim of the Universal Link is to reduce the amount of wires in the network by sending data from N signal through a single connection. These new approach reduces the number of bits transmitted to 84% of the original system, when N = 2, and up to 23% for N > 130. Also, the sampling frequency is considerable reduced.
Start page
283
End page
286
Language
English
OCDE Knowledge area
Ingeniería de sistemas y comunicaciones
Telecomunicaciones
Subjects
Scopus EID
2-s2.0-84982796220
ISBN of the container
9781467378352
Conference
LASCAS 2016 - 7th IEEE Latin American Symposium on Circuits and Systems, R9 IEEE CASS Flagship Conference
Sources of information:
Directorio de Producción Científica
Scopus