Title
Design optimization of copper patterns and location of power semiconductors and terminals
Date Issued
12 May 2021
Access level
metadata only access
Resource Type
conference paper
Author(s)
Waseda University
Publisher(s)
Institute of Electrical and Electronics Engineers Inc.
Abstract
In recent years, SiC power modules have attracted a lot of attention because they offer higher frequency and density as compared to the conventional Si power module. However high speed switching inevitably lead to the generation of surge voltage which may damage the power module. The design of layout, which composed of copper patterns, power semiconductors and terminals, is one of the factors that is necessary to overcome the problem. In this paper, the layout design of the half-bridge power module is optimized to reduce its internal inductance. The inductance was evaluated by electromagnetic field simulation.
Start page
157
End page
158
Language
English
OCDE Knowledge area
Física de partículas, Campos de la Física
Ingeniería eléctrica, Ingeniería electrónica
Subjects
Scopus EID
2-s2.0-85113287928
ISBN of the container
9784991191114
Conference
2021 International Conference on Electronics Packaging, ICEP 2021
Sponsor(s)
ACKNOWLEDGMENT This work was supported by Council for Science, Technology and Innovation (CSTI), Cross-ministerial Strategic Innovation Promotion Program (SIP), “Energy systems of an Internet of Energy (IoE) society” (Funding agency: JST).
Sources of information:
Directorio de Producción Científica
Scopus