Liquid phase crystallization (LPC) has proven to be a suitable method to grow large-grained silicon films on commercially well available glass substrates. Zone-melting crystallization with high energy density line sources such as lasers or electron beams enabled polycrystalline grain growth with wafer equivalent morphology. A lot of effort was put into interlayer optimization by different groups. Open circuit voltages above 630 mV and efficiencies up to 11.8% were demonstrated using n-type absorbers on a sputtered interlayer between glass substrate and silicon absorber comprising a triple stack of SiO2/SiNx/SiO2. In this work we report on our results to further improve device performance by investigating the influence of the interlayer on the open circuit voltage of the devices and demonstrate first results achieved on an interdigitated back contacted silicon heterojunction solar cell to simplify device fabrication.