This paper presents an analysis of the temporal behaviour of packet loss in output buffered packet switches under bursty traffic loading. Analytic models are developed for a packet switch where a number of bursty packet arrivals are multiplexed onto an output buffered switch. We present exact analytic expressions and techniques for computing various cell loss characteristics such as the time distribution of the system in the blocking periods, and durations of the nonblocking and blocking periods. We show through a number of numerical examples the effects of traffic loading and correlation in the packet arrivals, as well as system parameters such as buffer size and speed-up factor of the switch fabric, on the packet loss process.